TSV (Through Silicon Via) heater

Thu, 18 Jun 2026 00:59:21 +0800

On the fab floor, TSV etch and fill don’t leave room for thermal drift. A 2°C swing during photoresist bake will wreck critical dimension control and leave voids in the via fill. The TSV heater keeps wafer-level uniformity at ±0.1°C, across the whole process window. What matters under the hood We built the TSV heater around fast-response halogen lamps, tuned to short-wave NIR so the resist and silicon absorb directly. Temperature setpoints settle in sub-second time, and ramp rates hold repeatability within 0.5°C/s. The system runs in Class 1–100 cleanrooms without adding particles, verified at ≤0.1 particles/cm². It’s rated for 24/7 duty with zero unplanned downtime, and the thermal budget stays under control so via integrity and barrier layers aren’t compromised. Why this lands in real TSV work You’re running TSV stacks with tight pitch and thin dielectrics. Our heater keeps the thermal profile across the wafer consistent, so soft bake and hard bake stay in spec lot after lot. The payoff is stable lithography, less rework, and via sealing you can count on. Energy use drops because the lamps hit setpoint quickly and hold it with minimal overshoot, cutting cycle time without cutting corners. What you need to plan for Installation hinges on precise optical alignment and a dedicated exhaust path to handle outgassing during the bake. The heater works with standard chuck interfaces, but footprint constraints on legacy tools may mean a custom adapter. Block in a short qualification run to map temperature across the wafer and calibrate the recipe. Once that’s set, the process stays repeatable, shift after shift.

Via) on Five-Star Infrared Heating Systems

TSV (Through Silicon Via) heater